@pastermil@sh.itjust.works to Programmer Humor@lemmy.ml • 6 months agoSome Mnemonicssh.itjust.worksimagemessage-square20fedilinkarrow-up1352arrow-down16
arrow-up1346arrow-down1imageSome Mnemonicssh.itjust.works@pastermil@sh.itjust.works to Programmer Humor@lemmy.ml • 6 months agomessage-square20fedilink
minus-square@9point6@lemmy.worldlinkfedilink27•6 months agoI still don’t know why this architecture went for a Double XOR as the NOP, I guess they were just flexing that the reference chip design could do both in a single cycle
minus-square@pancake@lemmygrad.mllinkfedilink4•edit-218 days agoThis content will be automatically deleted
I still don’t know why this architecture went for a Double XOR as the NOP, I guess they were just flexing that the reference chip design could do both in a single cycle
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